analog in-memory computing

A computing approach in which matrix–vector multiplications are performed physically inside arrays of memory devices that store the weightsweights, n.: The learned numbers inside a neural network that set how strongly each part influences the next. The finished set of weights is, in effect, the trained model itself., rather than moving the weights to a separate processor. Each weight is encoded as a device conductance (in phase-change memory, resistive RAM, flash or SRAMSRAM, abbr.: The fastest kind of computer memory, built directly into processor chips. It is quick but takes up a lot of space, so chips hold only a little of it. cells) at a crossing point of a grid; applying input voltages to the rows produces currents that multiply by Ohm's law and sum along each column by Kirchhoff's current law, so a multiply–accumulate over thousands of weights happens in one step, with analog-to-digital converters reading the results. This attacks the von Neumann bottleneckvon Neumann bottleneck, n.: The traffic jam caused by ordinary computers keeping data and processing in separate places, so information must constantly shuttle back and forth through one narrow channel. and the energy cost of data movement, but analog noise, device variability and conductance drift limit precision to a few bits and converters add overhead, so models need noise-aware training and digital correction. IBM's 2023 phase-change chip ran speech recognition at near-software accuracy, but commercial use remains limited.